PWM #2 - Diving Into the PWM Unit

Welcome back, in the second part of our PWM series, we will be delving into the PWM unit. We begin by opening and examining the M031/M032 Series Technical Reference Manual prepared by Nuvoton.

Since we operate the PWM unit in Independent mode (to be able to control each channel separately), the block diagram that concerns us is as shown in Figure-1.

Let's examine the blocks in the diagram one by one:

1. Prescaler: The Prescaler unit divides the clock signal coming from PWM0_CLK0 as desired. It takes a 12-bit value, so we can enter a value between 0 and 4095 to divide the clock signal up to 4095. As seen in the timing diagram, the PWM0_CLK is divided by the CLKPSC value and the Counter unit is triggered. The Prescaler value is critical for operating the PWM signal at the desired frequency.

2. Counter: The Counter unit operates in 3 different modes; Up Counter, Down Counter, and Up Down Counter. We will operate in the Up Counter mode, which is most suitable for our application. That is, it counts from 0 to the CNT value we determine and then resets. It has a 16-bit width. So, it can take values up to 65535.

3. Comparator: The Comparator unit is constantly compared with the Counter unit. When equality is achieved, it triggers the Pulse Generator unit.

4. Pulse Generator: The Pulse Generator unit, since we operate in Independent mode and Up Counter mode, is triggered in 3 situations. These are; Zero Point when the Counter unit exceeds the value of 0, CMPU when the Counter unit equals the Comparator unit, and Period Point when it completes its period. The Pulse Generator unit can make the output channel LOW or HIGH at these triggers. If desired, it can also hold in the NOTHING state.

5. Output Control: The Output Control unit only takes on a key role in our application. To be able to give an output, we need to activate this switch.

The timing diagram we have created for our application is as follows.

As can be seen, CMP (Comparator value) and CNT (Counter value) trigger the Pulse Generator at 3 points. At these points, the Pulse Generator can arrange the output of the PWM channel as desired.

As seen in the figure above, the Pulse Generator makes the output LOW at the CMPU trigger and HIGH at the Zero Point trigger. Thanks to this feature, the Duty Cycle can be changed by modifying CMPDAT (Comparator value).

Let's write our own algorithm:

• We adjust the value of PWM0_CLK0 from the Clock unit for the PWM frequency we want. In our example, we set this value to 16MHz.

• We set it to work in Independent mode and as an Up Counter for the PWM unit to work as we wish.

• We adjust the CNT value for the Duty Cycle resolution we want. We have a 16-bit resolution offered by the hardware, but we can change this value according to the necessity of our project. In our example, we set the CNT value to 1000 in decimal.

• We adjust the Pulse Generator unit to bring it to the waveform we want. As given in the example, we set it to LOW at the CMPU trigger, HIGH at the Zero Point trigger, and NOTHING at the Period Point trigger.

• We activate the output switch from the Output Control unit.

• We also activate the Counter unit and the PWM unit starts working.

• Within the loop, we adjust the CMPDAT value to the desired Duty Cycle value.

Now we have the basic understanding and setup for our PWM. This will allow us to manipulate and control the PWM signal according to our needs. In the next part of our series, we will look at how we can implement this in code and provide a practical example to solidify our understanding. We will also explore different applications where this knowledge can be applied.

Remember, the key to mastering these concepts lies in practicing and experimenting. So, feel free to play around with the different configurations and see how they impact your PWM signals. Stay tuned for our next installment, where we dive even deeper into the fascinating world of PWM control. Until then, happy experimenting!